Electronic Failure Analysis
The ever increasing complexity of circuitry and related component packaging demands ever better quality in the sample preparation of electronic devices for failure analysis, competitive analysis and yield enhancement. ULTRA TEC offers the industry's widest range of sample preparation equipment to assist the electronic engineer in tackling problems head-on.
BACKSIDE PREPARATION
Since product launch in 1999, ASAP-1® has become the standard piece of preparation equipment that engineers involved in disciplines such as failure analysis, yield enhancement and competitive analysis have come to rely on for backside preparation. In recent years, driven by exponential growth of newer packaging types; CSP, MCM, BGA, flip chip to name a few; in addition to ever more demanding analytical methods, the applications array has been expanded to enable mechanical decapsulation, assurance of RAD-hard devices and topside de-processing.
ARC-lite is used as a free-standing unit for AR coating polished backside surfaces. The samples produced are wavelength-optimized and require no baking.
PARALLEL POLISHING & X-SECTIONING
Rapid, convenient, and reproducible saw cuts can be made with ULTRASLICE precision saws to reveal hidden defects, after subsequent lapping and polishing.
ULTRAPOL Advance parallel lapping offers high quality samples preparation, whether for topside, backside or cross-section. Use of the ULTRACOLLIMATOR makes sample alignment fast, accurate and repeatable compared with older systems that require long-winded mechanical indicators for alignment.
DECAPSULATION
Decapsulation is covered in more detail in the DECAPSULATION Application Area. Mechanical decapsulation brings with it several key benefits including extremely vertical ‘etch’ walls, extreme accuracy in setting the stopping distance, and the ability to add newer electronic endpointing methods.